The invention relates to an emitter-switched thyristor, having a main thyristor, which is formed from a p+ anode emitter, a drift zone having an opposing conduction type, a zone which, in the turned-off state of the thyristor, has a blocking zone with respect to the drift zone, and a cathode-side emitter having, again, a reversed conduction type resulting in a zone sequence p+n-pn+; a transistor structure, which is parallel to the main thyristor and comprises three regions of alternating conductivity types: an emitter, which is identical to the p+ anode emitter, an n-doped zone as a base, and a collector region; and, an NMOSFET for direct actuation of the cathode emitter, with the source of this transistor, like the collector region, being contacted by a cathode, which is connected to a cathode connector.
An advantage of emitter-switched thyristors is that they can easily be controlled via a gate having a low voltage drop. Most ESTs (Emitter-Switched Thyristors) have no pronounced current saturation, because the saturation is limited by the breakdown voltage of the turn-on MOSFET, which is switched in series with the main thyristor. The ESTs having a twin channel have the disadvantage of a high voltage drop in the forward direction. A MOSFET of this type is described in the publication of M. S. Shekar, B. J. Baliga, M. Nandakumar, S. Tandon and A. Reisman: "High-Voltage Current Saturation in Emitter Switched Thyristors," IEEE ELECTRON DEVICE LETTERS, VOL. 12, NO. 7, JULY 1991.
The publication of A. Bhalla, T. P. Chow, K. C. So: "RECEST: A Reverse Channel Emitter Switched Thyristor," ISPSD-95, Proc. Int. Symp. on Power Semic. Dev. and ICS, 1995, Yokohama, pp. 24-28, discloses an emitter-switched thyristor that forms a main thyristor between a "floating" n+ emitter, a p trough, an n drift region, an n buffer zone and a p+ substrate. The floating n+ emitter is short-circuited to the n+ drain region of the lateral, series-connected MOSFET by a floating metal connection. The thyristor current is thereby forced to flow through the series MOSFET. A parasitic thyristor is present between the n+ source, the p trough, the n drift region, the n buffer zone and the p+ substrate. Both parts of the gate are connected to the boundary of the cell, which forms an approximately 100- m-long strip in the z direction. The p trough under the floating n+ emitter is short-circuited in the z direction to the p+ region and the cathode at the boundary of the cell of the individual component (see FIG. 1).
Turn-on is effected by the application of a positive voltage to the gate and a positive bias voltage to the anode. The gate effects electron inversion layers under the lateral series MOSFET and the DMOS gate. The electrons flow from the cathode and into the drift region via the lateral series MOSFET, the floating metal connection, the floating n+ emitter and the DMOS channel. This in turn effects the injection of holes from the p+ substrate, a few of which are captured by the p trough. This hole current flows under the floating n+ emitter in the z direction, and polarizes the n+/p trough transition in the forward direction, and turns on the main thyristor. Because the lateral series MOSFET is regarded as the sole source of electrons for the floating n+ emitter (via the floating metal connection), the entire thyristor current must flow through the series MOSFET. This leads to a gate-switched current saturation in the turned-on state.
To turn off the component, a negative voltage is applied to the gate. The gate turns off the lateral series MOSFET and activates the p-channel MOSFET, which bypasses the hole current. This produces a path for the hole current from the p trough to the cathode contact. Because this hole current does not flow under the n+ source, the dynamic latching of the parasitic thyristor is suppressed. To the extent to which the anode voltage increases during turn-off, the potential of the JFET region will increase prior to the recovery of the transition between the p trough and the n drift region. Even if the gate is maintained at zero Volts, a p-type inversion layer is induced. Because the region of the p trough is likewise at a fairly-high potential (10-20 V), the PMOS distributer is activated, and the holes are led away via this path.
Some mechanisms for the malfunction of the component during turn-off have been established for emitter-switched thyristors. Examples include latching of the parasitic thyristor, breakdown of the lateral series MOSFET, breakdown in the z direction of the transition between the p trough and the n+ region at the boundary of the individual component cell, and current-induced avalanche breakdown at high voltages. This component can also be destroyed by one of these mechanisms, depending on the following design and operating conditions:
1. The current density for the latching of the parasitic thyristor can be brought to a higher level by the reduction in the dimensions of the regions on the right side of the p+ region of the distributor MOSFET. PA1 2. During turn-off, the potential of the floating n+ emitter increases with the potential of the p trough, whereas it follows the anode potential before the transition between the p trough and the n+ emitter region has recovered. Because the floating n+ emitter region is short-circuited to the drain region of the lateral series MOSFET, this can result in the breakdown of the MOSFET. PA1 3. When the PMOS distributor is activated, the hole current, which flows through the p channel, constructs a lateral voltage drop after being captured by the ptrough region. This voltage drop is the most positive on the left side of the component (see FIG. 1, center of the floating emitter region). Because the potential of the floating n+ emitter is limited to the diode drop of the very-positive p-trough potential, the transition from the p trough to the n+ region, starting from the center of the floating emitter and increasing up to the JFET region, is polarized in the blocking direction. Now, however, the region of the p trough is short-circuited to the cathode in the z direction. The bias voltage at the transition between the n+ emitter region and the p trough at the cell boundary is larger by the voltage drop over the PMOS channel than under the DMOS gate. This voltage drop can be large enough to lead to a breakdown of the transition under the gate. The breakdown of this transition will begin at the cell boundaries, very likely at the spatial transitions embodied at the corners of the floating emitter window.
In addition to the destruction caused during turn-on by the blocking polarization of the floating n+/p trough transition, and the aforementioned avalanche breakdown, known emitter-switched thyristors have the disadvantage that, in the turned-on state, the saturation of the anode current can only be effected by the saturation of the lateral NMOSFET. To attain a good saturation, the NMOSFET must have a high breakdown voltage. This, however, significantly increases its resistance in the turned-on state, and thus increases the voltage drop over the turned-on thyristor. During turn-off, the voltage drop in the lateral NMOSFET increases, and threatens to destroy the NMOSFET. The voltage drop is basically determined by the resistance in the turned-on state of the p channel in the JFET region. In this component, referred to as RECEST, the p channel is embodied as a longitudinal channel, and its "on" resistance is therefore very high.